1. Technical Field
The present invention relates generally to semiconductor manufacture, and more particularly, to the deposition of a conductive material in select regions of a semiconductor substrate.
2. Related Art
Current semiconductor manufacturing processes typically utilize an aggressive chemical mechanical polishing (CMP) step to remove excess unwanted conductive material deposited on the surface of a semiconductor substrate, leaving only the conductive material within the circuit features. Otherwise, the excess conductive material remaining on the top surface of the substrate may cause shorts within the semiconductor device.
One problem that arises as a result of the CMP step is a phenomenon known as xe2x80x9cdishing.xe2x80x9d Dishing often occurs during the polishing of large circuit features, wherein the soft deformable CMP polishing pad sinks into the circuit feature, forming a concave or xe2x80x9cdishxe2x80x9d-shaped indentation in the surface of the circuit feature. Unfortunately, such deformities typically replicate throughout the subsequent layers of the device.
Attempts have been made in the industry to solve the problems associated with the CMP step. For example, excess filler material, or xe2x80x9cdummyxe2x80x9d features, have been placed within the circuit features to prevent the CMP pad from contacting the surface of the feature. Similarly, techniques utilizing selective oxide polishing having a polish stop layer have been used. However, these attempted solutions have increased the time and cost of production by adding manufacturing steps and additional materials. Furthermore, these techniques have restricted the variety of features that could be formed within the semiconductor substrate.
Therefore, there exists a need in the industry for a method of forming a semiconductor device which solves the above problems.
The present invention provides a method of selectively depositing a conductive material within desired regions of a semiconductor substrate.
The first general aspect of the present invention provides a method of forming a semiconductor device, comprising the steps of: providing a substrate having at least one feature therein; depositing a seed layer over the substrate; rendering select regions of the seed layer ineffective to plating; and plating a conductive material on the substrate.
The second general aspect of the present invention provides a semiconductor device, comprising: a substrate, having at least one circuit feature therein; a seed layer covering the substrate, wherein the seed layer is ineffective to electroplating in select regions of the substrate.
The third general aspect of the present invention provides a method of forming circuit features, comprising: providing a substrate having at least one cavity therein; depositing a liner over a surface of the substrate; depositing a seed layer over the liner; rendering the seed layer ineffective to electroplating in select regions of the substrate; and electroplating a conductive material within the at least one cavity.
The foregoing and other features and advantages of the invention will be apparent from the following more particular description of embodiments of the invention.